CPU architecture

Components of a CPU

Based upon a Von-Neumann machine - stored program approach. where both the data and the program are stored in main memory.

                FDE CYCLE



Fetch - the next instruction is fetched from main memory
Decode - the instruction gets interrupted/ decoded , signals produced to control other internal components (ALU for example)
Execute - the instructions get executed

 Registers
A register is a small block of memory usually bytes, whish is used as temporary storage for instructions as they are being processed

general purpose registers are used as programs run , to enable calculations to be made and can be sued for any purpose the programmer chooses/ special purpose registers are crucial; to how the processor works .values are loaded in and out of registers during execution of a process some examples of special purpose registers are

• program counter (PC)
• memory address register and memory data register (MDR) (MAR)
• current address register  (CAR)
• accumulator

Program counter - points to next instruction to be executed
This holds addresses of the next instruction that is to be fetched -decoded-executed. This will increment automatically as the current instruction being decoded. (not current instruction - next one(+1)) only moves onto next instruction when the current one is being decoded .

Memory address register (MAR) - holds  location of instruction
 This holds the current instruction being executed.It points to the relevant location in memory where the required instruction is ( at this stage the address is simply copied from the program counter )

Memory data register (MDR) - gets information from main memory (Temporary store)
the mdr can contain both instructions and data. At this stage , an instruction has been fetched and is being stored here enroute to the current instruction register, The instruction is copied from the memory location pointed to by the MAR.

Current instruction register (CIR) - current instruction is decoded and executed
is used to store th3e current instruction to be decoded and executed (copied from the MDR).As the instruction in the CIR is being decoded and executed , the next instruction is being fetched into the MDR

Decoding and executing the instruction
the instruction in the CIR gets decoded. As this happens the PC(program counter) automatically increments.

Control unit (CU) - overall management of data and instructions movement
the control unit co-ordinated all of these fetch decode and execute activities. At each clock pulse , it controls the movement of data and instructions between the registers , main memory and input and output devices. Some instructions may take less time than a single clock cycle , but the next instruction will only start when the processor executed the next cycle.

Status register (SR) - status of instructions (has an overflow occurred)
this stores a combination of bits used to indicate the result of an instruction. For example one bit will be set to indicate that an instruction has caused an overflow. Another bit will be set to indicate tat the instruction produced a negative result. The status register also indicated whether an interrupt has been received.

Arithmetic logic unit (ALU) - calculations and comparisons instructions may require
The arithmetic logic unit carries out any arithmetic and logical operations required by any instruction that is executed. Calculations include floating point multiplication and integer divisions , while logic operations include comparison tests such as greater than or less than.

Accumulator (ACC) - holds the values for calculations
any instruction that performs a calculations it uses the ACC. many instructions operate on , or update , the ACC.If a subtraction instruction is run , it performs the subtraction using the data part if the instruction and stores the result in the ACC.


Buses
a bus is a path down which information can pass through. Think of a bus being a set of wires which is reserved for a particular type of information you won't go far wrong , although it doesn't have to be wires.
There are three components of the system bus
- Control  -  carries control signals to help manage the process, it sends commands to the different  components of the system
- Address - key communications and carries data in tandem with data bus , carries the location of which the data in the data bus should be delivered.
- Data bus - This is used to carry the data tat needs to be transferred from one part of the hardware to another , often memory

Common Architectures

Von Neumann

Many years ago, in fact 1945, just after the World War, two mathematician-scientists independently proposed how to build a more flexible computer. it has a shared memory space for instructions and data.

Memory

The computer will have memory that can hold both data and also the program processing that data. In modern computers this memory is RAM.

Control Unit

The control unit will manage the process of moving data and program into and out of memory and also deal with carrying out (executing) program instructions - one at a time. This includes the idea of a 'register' to hold intermediate values. In the illustration above, the 'accumulator' is one such register.

The 'one-at-a-time' phrase means that the von Neumann architecture is a sequential processing machine.

 

Input - Output

This architecture allows for the idea that a person needs to interact with the machine. Whatever values that are passed to and forth are stored once again in some internal registers.

Arithmetic Logic Unit

This part of the architecture is solely involved with carrying out calculations upon the data. All the usual Add, Multiply, Divide and Subtract calculations will be available but also data comparisons such as 'Greater Than', 'Less Than', 'Equal To' will be available.

Bus

Notice the arrows between components? This implies that information should flow between various parts of the computer. In a modern computer built to the Von Neumann architecture, information passes back and forth along a 'bus'. There are buses to identify locations in memory - an 'address bus'

And there are buses to allow the flow of data and program instructions - a 'data bus'.

Harvard architecture

• The idea of the Harvard Architecture is to split the memory into two parts.
•  One part for data and another part for programs.
• Each part is accessed with a different bus.
• This means the CPU can be fetching both data and instructions at the same time. There is also less chance of program corruption.
• used by risc processors

some other examples of CPU architectures include :

• Embedded CPU architectures e.g.                 Intel's 8051 architecture
• Microcomputer CPU architectures e.g.        MOS Technology's 6502 architecture
• mixed - core CPU architectures e.g.              CAS's Loogson
• Workstation/ Server CPU architectures e.g. oracle's architecture